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Makefiles: build a binary for each arch target

This fixes a build issue when common code would be modified while having
a pre-built arch .o file, the arch-specific binary wouldn't be rebuilt.

--- a/Makefile

+++ b/Makefile

@@ -20,10 +20,10 @@

 	for i in cc1 cc2; \

 	do \

 		(cd $$i; \

-		ARCH=$@ $(MAKE) -e $$i || exit); \

+		ARCH=$@ $(MAKE) -e $$i-$@ || exit); \

 	done

-	ln -f cc1/cc1 bin/cc1-$@

-	ln -f cc2/cc2 bin/cc2-$@

+	ln -f cc1/cc1-$@ bin/

+	ln -f cc2/cc2-$@ bin/

 bin:

 	mkdir -p bin

--- a/cc1/Makefile

+++ b/cc1/Makefile

@@ -6,7 +6,7 @@

 OBJS = types.o decl.o lex.o error.o symbol.o main.o expr.o \

 	code.o stmt.o cpp.o fold.o init.o arch/$(ARCH)/arch.o

-all: cc1

+all: cc1-$(ARCH)

 cpp.o: stallman.msg

 $(OBJS): cc1.h ../inc/cc.h ../inc/sizes.h

@@ -17,11 +17,11 @@

 ../lib/libcc.a:

 	cd ../lib && $(MAKE) -e

-cc1: $(OBJS) ../lib/libcc.a

+cc1-$(ARCH): $(OBJS) ../lib/libcc.a

 	$(CC) $(SCC_LDFLAGS) $(OBJS) ../lib/libcc.a -o $@

-cpp: cc1

-	ln -f cc1 cpp

+cpp: cc1-$(ARCH)

+	ln -f $< cpp

 test:

 	cd tests && ./chktest.sh *.c

@@ -28,4 +28,4 @@

 clean:

 	rm -f $(OBJS)

-	rm -f cc1 cpp

+	rm -f cc1-* cpp

--- a/cc2/Makefile

+++ b/cc2/Makefile

@@ -7,7 +7,7 @@

        arch/$(ARCH)/code.o arch/$(ARCH)/cgen.o \

        arch/$(ARCH)/types.o arch/$(ARCH)/optm.o

-all: cc2

+all: cc2-$(ARCH)

 main.o: error.h

 $(OBJS): cc2.h ../inc/sizes.h ../inc/cc.h

@@ -24,9 +24,9 @@

 ../inc/sizes.h:

 	cp ../inc/sizes_$(STD).h $@

-cc2: $(OBJS) ../lib/libcc.a

+cc2-$(ARCH): $(OBJS) ../lib/libcc.a

 	$(CC) $(SCC_LDFLAGS) $(OBJS) ../lib/libcc.a -o $@

 clean:

 	rm -f $(OBJS)

-	rm -f cc2 error.h

+	rm -f cc2-* error.h