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bcm, bcm64: clean dma destination buffer before issuing dma in case of non cache-line-size aligned buffer

--- a/sys/src/9/bcm/dma.c

+++ b/sys/src/9/bcm/dma.c

@@ -174,6 +174,7 @@

 	switch(dir){

 	case DmaD2M:

 		ctlr->flush = dst;

+		dmaflush(1, dst, len);

 		ti = Srcdreq | Destinc;

 		cb->sourcead = dmaioaddr(src);

 		cb->destad = dmaaddr(dst);

@@ -187,6 +188,7 @@

 		break;

 	case DmaM2M:

 		ctlr->flush = dst;

+		dmaflush(1, dst, len);

 		dmaflush(1, src, len);

 		ti = Srcinc | Destinc;

 		cb->sourcead = dmaaddr(src);