shithub: riscv

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ref: 2830cd7eb6182eb7bc42e10557a160156649859c
parent: ea30cf94a5f247dd00c32c01325b8a47ad5f105a
author: cinap_lenrek <[email protected]>
date: Sat Dec 17 14:47:35 EST 2016

pc: modify cpu0 page tables in patwc() instead of current cpu ones

on 386 kernel, each processor has its own pdb where the primary
pdb for kernel mappings is on cpu0 and other cpu's lazily pull
pdb entries from cpu0 when they fault in vmapsync().

so we have to edit the table tables in the pdb of cpu0 and not
the current processor.

--- a/sys/src/9/pc/mmu.c
+++ b/sys/src/9/pc/mmu.c
@@ -1097,12 +1097,12 @@
 
 	/* set the bits for all pages in range */
 	for(va = (ulong)a; n > 0; n -= z, va += z){
-		pte = mmuwalk(m->pdb, va, 1, 0);
+		pte = mmuwalk(MACHP(0)->pdb, va, 1, 0);
 		if(pte && (*pte & (PTEVALID|PTESIZE)) == (PTEVALID|PTESIZE)){
 			z = 4*MB - (va & (4*MB-1));
 			mask = 3<<3 | 1<<12;
 		} else {
-			pte = mmuwalk(m->pdb, va, 2, 0);
+			pte = mmuwalk(MACHP(0)->pdb, va, 2, 0);
 			if(pte == 0 || (*pte & PTEVALID) == 0)
 				panic("patwc: va=%#p", va);
 			z = BY2PG - (va & (BY2PG-1));