shithub: riscv

Download patch

ref: 639500b7487174176e315c25499cfabdd4a4af3c
parent: 561346d07f176356e9841891e5213672c0a33878
author: aiju <devnull@localhost>
date: Mon Jan 13 18:22:35 EST 2020

cycv: support for registers

--- a/sys/src/9/cycv/dat.h
+++ b/sys/src/9/cycv/dat.h
@@ -203,6 +203,7 @@
 #define mpcore ((ulong*)MPCORE_BASE)
 #define resetmgr ((ulong*)RESETMGR_BASE)
 #define sysmgr ((ulong*)SYSMGR_BASE)
+#define l3 ((ulong*)L3_BASE)
 
 /*dmacopy*/
 #define SRC_INC (1<<0)
--- a/sys/src/9/cycv/devarch.c
+++ b/sys/src/9/cycv/devarch.c
@@ -9,6 +9,8 @@
 
 #define fpga ((ulong*) FPGAMGR_BASE)
 
+enum { REMAP = 0x0 / 4 };
+
 enum { Timeout = 3000 };
 
 enum {
@@ -56,6 +58,8 @@
 };
 static int narchdir = Qbase;
 
+static Physseg *axi;
+
 static Ref fpgawopen;
 enum { FPGABUFSIZ = 65536 };
 static uchar *fpgabuf;
@@ -119,7 +123,11 @@
 		[10] {1, 4, COMP|AESMAYBE|PORFAST|FPP32},
 		[14] {1, 4, COMP|AESMAYBE|FPP32}
 	};
-	
+
+	axi->attr |= SG_FAULT;
+	procflushpseg(axi);
+	flushmmu();
+
 	if((fpga[FPGAPINS] & FPGA_POWER_ON) == 0)
 		error("FPGA powered off");
 	msel = fpga[FPGASTAT] >> 3 & 0x1f;
@@ -187,6 +195,10 @@
 		return;
 	}
 	fpga[FPGACTRL] &= ~HPSCONFIG;
+	
+	axi->attr &= ~SG_FAULT;
+	procflushpseg(axi);
+	flushmmu();
 }
 
 static long
@@ -256,13 +268,26 @@
 	}
 }
 
-static void
-archreset(void)
+void
+archinit(void)
 {
+	Physseg seg;
+
 	fpga[FPGAINTEN] = 0;
 	fpga[FPGAEOI] = -1;
 	fpga[FPGAINTTYPE] = -1;
 	intrenable(FPGAMGRIRQ, fpgairq, nil, LEVEL, "fpgamgr");
+	
+	resetmgr[BRGMODRST] &= ~7;
+	l3[REMAP] = 0x18;
+
+	memset(&seg, 0, sizeof seg);
+	seg.attr = SG_PHYSICAL | SG_DEVICE | SG_NOEXEC | SG_FAULT;
+	seg.name = "axi";
+	seg.pa = 0xFF200000;
+	seg.size = 0x200000;
+	axi = addphysseg(&seg);
+
 }
 
 static Chan*
@@ -275,7 +300,7 @@
 	'P',
 	"arch",
 	
-	archreset,
+	devreset,
 	devinit,
 	devshutdown,
 	archattach,
--- a/sys/src/9/cycv/io.h
+++ b/sys/src/9/cycv/io.h
@@ -9,9 +9,11 @@
 #define FPGAMGRDATA 0xFFB90000
 #define OCRAM 0xFFFF0000
 #define DMAS_BASE 0xFFE01000
+#define L3_BASE 0xFF800000
 
 /*RESETMGR*/
 #define PERMODRST (0x14/4)
+#define BRGMODRST (0x1C/4)
 /*SYSMGR*/
 #define FPGA_MODULE (0x28/4)
 
--- a/sys/src/9/cycv/main.c
+++ b/sys/src/9/cycv/main.c
@@ -302,6 +302,7 @@
 		bootlinks();
 	else
 		links();
+	archinit();
 	chandevreset();
 	pageinit();
 	userinit();