ref: acab8881bc2c0befcda62c2e6cc479cd7529dbe3
parent: ca2f1c07f2a6bb48582b990868976b45d3663605
author: cinap_lenrek <[email protected]>
date: Sat Sep 14 10:02:34 EDT 2019
bcm64: enter page tables in mmutop *AFTER* switching asid in mmuswitch() there was a small window between modifying mmutop and switching the asid where the core could bring in the new entries under the old asid into the tlb due to speculation / prefetching. this change moves the entering of the page tables into mmutop after setttbr() to prevent this scenario. due to us switching to the resereved asid 0 on procsave()->putasid(), the only asid that could have potentially been poisoned would be asid 0 which does not have any user mappings. so this did not show any noticable effect.
--- a/sys/src/9/bcm64/mmu.c
+++ b/sys/src/9/bcm64/mmu.c
@@ -499,15 +499,15 @@
p->newtlb = 0;
}
- for(t = p->mmuhead[PTLEVELS-1]; t != nil; t = t->next){- va = t->va;
- m->mmutop[PTLX(va, PTLEVELS-1)] = t->pa | PTEVALID | PTETABLE;
- }
-
if(allocasid(p))
flushasid((uvlong)p->asid<<48);
setttbr((uvlong)p->asid<<48 | PADDR(m->mmutop));
+
+ for(t = p->mmuhead[PTLEVELS-1]; t != nil; t = t->next){+ va = t->va;
+ m->mmutop[PTLX(va, PTLEVELS-1)] = t->pa | PTEVALID | PTETABLE;
+ }
}
void