ref: 67ec82a2620b890e9a0ccbf446b1447f8ab3a80d
parent: 571b7c978ec5fed594f7abdd451974e671e6b8bb
parent: d6be2671edc3be0c9be260b3f0130ab19bb50142
author: Jingning Han <[email protected]>
date: Mon Sep 21 12:13:37 EDT 2015
Merge "Create sub8x8 block inter prediction function"
--- a/vp10/common/reconinter.c
+++ b/vp10/common/reconinter.c
@@ -128,6 +128,53 @@
}
}
+void vp10_build_inter_predictor_sub8x8(MACROBLOCKD *xd, int plane,
+ int i, int ir, int ic,
+ int mi_row, int mi_col) {+ struct macroblockd_plane *const pd = &xd->plane[plane];
+ MODE_INFO *const mi = xd->mi[0];
+ const BLOCK_SIZE plane_bsize = get_plane_block_size(mi->mbmi.sb_type, pd);
+ const int width = 4 * num_4x4_blocks_wide_lookup[plane_bsize];
+ const int height = 4 * num_4x4_blocks_high_lookup[plane_bsize];
+
+ uint8_t *const dst = &pd->dst.buf[(ir * pd->dst.stride + ic) << 2];
+ int ref;
+ const int is_compound = has_second_ref(&mi->mbmi);
+ const InterpKernel *kernel = vp10_filter_kernels[mi->mbmi.interp_filter];
+
+ for (ref = 0; ref < 1 + is_compound; ++ref) {+ const uint8_t *pre =
+ &pd->pre[ref].buf[(ir * pd->pre[ref].stride + ic) << 2];
+#if CONFIG_VP9_HIGHBITDEPTH
+ if (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH) {+ vp10_highbd_build_inter_predictor(pre, pd->pre[ref].stride,
+ dst, pd->dst.stride,
+ &mi->bmi[i].as_mv[ref].as_mv,
+ &xd->block_refs[ref]->sf, width, height,
+ ref, kernel, MV_PRECISION_Q3,
+ mi_col * MI_SIZE + 4 * ic,
+ mi_row * MI_SIZE + 4 * ir, xd->bd);
+ } else {+ vp10_build_inter_predictor(pre, pd->pre[ref].stride,
+ dst, pd->dst.stride,
+ &mi->bmi[i].as_mv[ref].as_mv,
+ &xd->block_refs[ref]->sf, width, height, ref,
+ kernel, MV_PRECISION_Q3,
+ mi_col * MI_SIZE + 4 * ic,
+ mi_row * MI_SIZE + 4 * ir);
+ }
+#else
+ vp10_build_inter_predictor(pre, pd->pre[ref].stride,
+ dst, pd->dst.stride,
+ &mi->bmi[i].as_mv[ref].as_mv,
+ &xd->block_refs[ref]->sf, width, height, ref,
+ kernel, MV_PRECISION_Q3,
+ mi_col * MI_SIZE + 4 * ic,
+ mi_row * MI_SIZE + 4 * ir);
+#endif // CONFIG_VP9_HIGHBITDEPTH
+ }
+}
+
static void build_inter_predictors_for_planes(MACROBLOCKD *xd, BLOCK_SIZE bsize,
int mi_row, int mi_col,
int plane_from, int plane_to) {--- a/vp10/common/reconinter.h
+++ b/vp10/common/reconinter.h
@@ -131,6 +131,10 @@
int x, int y, int w, int h,
int mi_x, int mi_y);
+void vp10_build_inter_predictor_sub8x8(MACROBLOCKD *xd, int plane,
+ int i, int ir, int ic,
+ int mi_row, int mi_col);
+
void vp10_build_inter_predictors_sby(MACROBLOCKD *xd, int mi_row, int mi_col,
BLOCK_SIZE bsize);
--- a/vp10/encoder/rdopt.c
+++ b/vp10/encoder/rdopt.c
@@ -1273,6 +1273,7 @@
int64_t *distortion, int64_t *sse,
ENTROPY_CONTEXT *ta,
ENTROPY_CONTEXT *tl,
+ int ir, int ic,
int mi_row, int mi_col) {int k;
MACROBLOCKD *xd = &x->e_mbd;
@@ -1283,49 +1284,16 @@
const int width = 4 * num_4x4_blocks_wide_lookup[plane_bsize];
const int height = 4 * num_4x4_blocks_high_lookup[plane_bsize];
int idx, idy;
-
const uint8_t *const src =
&p->src.buf[vp10_raster_block_offset(BLOCK_8X8, i, p->src.stride)];
uint8_t *const dst = &pd->dst.buf[vp10_raster_block_offset(BLOCK_8X8, i,
pd->dst.stride)];
int64_t thisdistortion = 0, thissse = 0;
- int thisrate = 0, ref;
+ int thisrate = 0;
TX_TYPE tx_type = get_tx_type(PLANE_TYPE_Y, xd, i);
const scan_order *so = get_scan(TX_4X4, tx_type);
- const int is_compound = has_second_ref(&mi->mbmi);
- const InterpKernel *kernel = vp10_filter_kernels[mi->mbmi.interp_filter];
- for (ref = 0; ref < 1 + is_compound; ++ref) {- const uint8_t *pre = &pd->pre[ref].buf[vp10_raster_block_offset(BLOCK_8X8, i,
- pd->pre[ref].stride)];
-#if CONFIG_VP9_HIGHBITDEPTH
- if (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH) {- vp10_highbd_build_inter_predictor(pre, pd->pre[ref].stride,
- dst, pd->dst.stride,
- &mi->bmi[i].as_mv[ref].as_mv,
- &xd->block_refs[ref]->sf, width, height,
- ref, kernel, MV_PRECISION_Q3,
- mi_col * MI_SIZE + 4 * (i % 2),
- mi_row * MI_SIZE + 4 * (i / 2), xd->bd);
- } else {- vp10_build_inter_predictor(pre, pd->pre[ref].stride,
- dst, pd->dst.stride,
- &mi->bmi[i].as_mv[ref].as_mv,
- &xd->block_refs[ref]->sf, width, height, ref,
- kernel, MV_PRECISION_Q3,
- mi_col * MI_SIZE + 4 * (i % 2),
- mi_row * MI_SIZE + 4 * (i / 2));
- }
-#else
- vp10_build_inter_predictor(pre, pd->pre[ref].stride,
- dst, pd->dst.stride,
- &mi->bmi[i].as_mv[ref].as_mv,
- &xd->block_refs[ref]->sf, width, height, ref,
- kernel, MV_PRECISION_Q3,
- mi_col * MI_SIZE + 4 * (i % 2),
- mi_row * MI_SIZE + 4 * (i / 2));
-#endif // CONFIG_VP9_HIGHBITDEPTH
- }
+ vp10_build_inter_predictor_sub8x8(xd, 0, i, ir, ic, mi_row, mi_col);
#if CONFIG_VP9_HIGHBITDEPTH
if (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH) {@@ -1965,6 +1933,7 @@
&bsi->rdstat[i][mode_idx].bsse,
bsi->rdstat[i][mode_idx].ta,
bsi->rdstat[i][mode_idx].tl,
+ idy, idx,
mi_row, mi_col);
if (bsi->rdstat[i][mode_idx].brdcost < INT64_MAX) {bsi->rdstat[i][mode_idx].brdcost += RDCOST(x->rdmult, x->rddiv,