ref: 1a5dafcc3d8c455b0e7b36dd9bd45c13dd4d91eb
dir: /sys/man/3/vmx/
.TH VMX 3 .SH NAME vmx \- x86 virtualization interface .SH SYNOPSIS .nf .B #X/clone .B #X/n .B #X/n/ctl .B #X/n/fpregs .B #X/n/map .B #X/n/regs .B #X/n/status .B #X/n/wait .fi .SH DESCRIPTION The .I vmx device supports "virtual CPUs" using the Intel VT-x extension (a.k.a. VMX instruction set). This is used by .IR vmx (3) to implement virtual machines. Access to the .I vmx device is restricted to the hostowner. .PP The top level directory contains a .B clone file and numbered subdirectories representing the allocated virtual CPUs. Opening the clone file allocates a new virtual CPU and returns the file descriptor to its .B ctl file. The .B ctl file provides the main control interface. See below for a list of commands. Reading returns the subdirectory number. Removing the .B ctl file marks the virtual CPU as moribund. The .B status file contains the current status of the virtual CPU, which is one of .TF \fLrunning\fR .TP \fLinit\fR The virtual CPU is being initialized. .TP \fLready\fR The virtual CPU is idle. .TP \fLrunning\fR The virtual CPU is executing code. .TP \fLdead\fR The virtual CPU suffered a fatal error. This state may be followed by an error message. .TP \fLending\fR The virtual CPU is shutting down. .LP The .B map file contains the memory map that the virtual CPU will see. It consists of lines of the form .IP \fIaccess\fR \fIcache\fR \fIlowaddr\fR \fIhighaddr\fR \fIsegment\fR \fIoffset\fR .LP \fILowaddr\fR specifies the lowest address in the region and \fIhighaddr\fR one past the highest address. The region is mapped to a region of the same size in the global segment \fIsegment\fR (see .IR segment (3)), starting at \fIoffset\fR. The \fIaccess\fR field specifies the permitted types of access using the characters \fLr\fR (read), \fLw\fR (write), \fLx\fR (execute) and \fL-\fR (padding character). The \fIcache\fR field specifies the cacheability of the region, it must be one of \fLuc\fR, \fLwc\fR, \fLwt\fR, \fLwp\fR and \fLwb\fR (as defined in the Intel SDM). .PD .PP Writes to the .B map file append lines to the end. Multiple lines can be written at once but all lines written must be newline terminated. Regions can be overlapping, in which case later definitions always override earlier ones. The map can be cleared by opening the file with .B OTRUNC (see .IB open (2)). .PP The .B regs file contains the registers of the virtual CPU in the format \fIname value\fR. Writes to the file (in the same format) write to the referenced registers (if possible). Multiple lines can be written at once but all lines written must be newline terminated. .PP Some registers (\fLCR0\fR and \fLCR4\fR) are split into three registers, suffixed \fLreal\fR, \fLfake\fR and \fLmask\fR. In this case, \fLreal\fR corresponds to the bits that affect actual CPU execution, \fLfake\fR corresponds to the bits read back by the guest and the bits set in \fLmask\fR are those "owned" by the host. The guest is free to modify the bits that it owns (in which case it always has the same value in both \fLreal\fR and \fLfake\fR), but attempting to change a host-owned bit from the status in \fLfake\fR causes a VM exit. Certain bits are owned by the kernel, which means they are fixed in both \fLmask\fR and \fLreal\fR. .PP Reading the .B wait file will stall the reading process until the virtual CPU reaches a point where it cannot continue (a "VM exit"). This may be due to the an access to hardware or a software exception. Each exit is indicated by a single line in a format compatible with .I tokenize (see .IR getfields (2)). The first column contains the cause of the exit and the second column contains the "exit qualification" field that may contain more details on the exit (see Intel SDM). The remaining columns come in pairs and contain further info and the values of relevant registers. .LP Some notable exit causes are (see kernel source code for a complete list) .TF ".\fL#\fR\fIexception\fR" .TP \fL#\fR\fIexception\fR Exception of the specified type (e.g. \fL#gp\fR for general protection fault). Currently only debug exceptions are configured to cause VM exits. .TP \fLtriplef\fR Triple fault. .TP \fLeptfault\fR The virtual CPU attempted a memory access that does not match any entry in the \fLmap\fR file. .TP \fLmovcr\fR Illegal access to a control register (see above). .IP "\fL.\fR\fIinstr\fR" The virtual CPU attempted to execute the instruction \fIinstr\fR. .TP \fL*ack\fR Not an actual exit, but acknowledgement that an interrupt request (IRQ) was posted. .PD .PP The .B fpregs file contains the virtual CPU's floating point registers, in the same binary format used by .IR proc (3). .SS Control messages .TF "\fLextrap\fR [ \fIexcep\fR ]" .TP .B quit Destroy the current virtual CPU. .TP \fLgo\fR [ \fIregs\fR ] Launch the virtual CPU. \fIRegs\fR is an optional list of register changes in the format \fIname\fL=\fIvalue\fL;\fR that will be applied before launching. .TP .B stop Stop the virtual CPU. .TP \fLstep\fR [ \fIregs\fR ] Executes a single instruction with the virtual CPU. \fIRegs\fR is optinal, same as \fLgo\fR. .TP \fLexc\fR \fIexcep\fR The exception \fIexcep\fR is triggered in the virtual CPU. \fIExcep\fR can either be a named exception (such as \fL#gp\fR, in lower case) or an exception number. A number may be preeded by \fL#\fR to mark it as an exception, otherwise it is delivered as an interrupt (but always disregarding whether interrupts are enabled). .TP \fLirq\fR [ \fIexcep\fR ] An Interrupt is posted, i.e. the exception \fIexcep\fR will be triggered the next time interrupts are enabled in the virtual CPU, at which point a .B *ack message is sent to .BR wait. .IExcep\fR uses the same format as the argument of \fBexc\fR. .B Irq cancels any interrupts that have been previously posted but not yet delivered and it can be called with no argument to cancel an interrupt. .TP \fLextrap\fR \fIbitmap\fR Changes the exception bitmap. Set bits cause a VM exits. .SH SOURCE .B /sys/src/9/pc/devvmx.c .SH "SEE ALSO" .IR vmx (1), .IR cpuid (8) Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3B, Chapters 23-33. .SH BUGS .I Devvmx can and will crash your kernel. .SH HISTORY .I Devvmx first appeared in 9front (June, 2017).